The present invention relates to overvoltage protection and, more particularly, to a voltage clamp circuit suitable to be manufactured in monolithic integrated circuit form for clamping the voltage applied thereacross to a predetermined low value.
It is well known that emitter-base breakdown of typical monolithic integrated bipolar transistors can occur at a voltage range of approximately 5.3-7.2 volts. If the emitter-base junction of the transistor is repeatedly subjected to a reverse voltage applied thereacross which exceeds this breakdown voltage level the transistor can be destroyed or at least degraded. For instance, if the emitter-base junction is repeatedly caused to go into a avalanche condition by having its reverse breakdown voltage level exceeded, the transistor's forward current gain, beta, may be seriously affected which in turn affects the circuit operation in which the transistor is included.
In one contemplated circuit, a pair of bipolar integrated NPN transistors are differentially connected to thereby form a conventional differential amplifier. A problem in this circuit arises in that the two bases of the differentially connected transistors are coupled to respective inputs of the integrated circuit in which the two transistors are formed in order to allow user access to the inputs of the differential amplifier. In this application, it is possible for the input signal, supplied to differential amplifier inputs by the user, to exceed the reverse breakdown voltage characteristics of the non-conducting transistor of the differentially connected pair. For example, the supplied alternating input signal may exceed the value of .+-.(VEBS+VBE), where VEBS is the reverse emitter breakdown voltage of the nonconducting transistor and VBE is the forward emitter-to-base voltage of the conducting transistor. If this voltage level is exceeded, the transistors of the differential amplifier can be degraded as aforedescribed. It is therefore desirable to have an overvoltage protection circuit that would clamp the voltage applied to the input of the differential amplifier to a value which is less than .+-.(VEBS+VBE).
Additionally, it is desirable to allow the voltage level applied across the inputs of the differential amplifier to be as great as possible yet not exceed the above mentioned value in order that maximum gain can be achieved.
Another aspect of such a voltage clamp circuit is that the breakdown voltage thereof be adjustable in order to obtain an optimum tradeoff between protection of the transistors of the differential amplifier, for instance, and the usable input voltage range.
It is a further desirable aspect of such a voltage clamp circuit that the characteristics thereof track the emitter-base breakdown characteristics of integrated transistors so that variations in the breakdown characteristics of the transistors from process to process and lot to lot are compensated therefore.
Hence, a need exists for a low voltage clamp circuit suitable to be fabricated in monolithic integrated circuit form having the above described attributes.